Licenses Arm Artisan Physical IP to Optimize Arm-based SoC Designs with Minima Dynamic Margining IP Ultra-Low Power Technology
OULU, Finland, Mar 8, 2019 – Minima Processor Oy today signed a multi-year Strategic Intellectual Property (IP) Agreement with Arm in which Minima Processor will have access to Arm Artisan Physical IP for 22nm ultra-low leakage (ULL) process technology. This agreement allows Minima Processor to optimize Arm-based system-on-chip (SoC) designs featuring Minima Dynamic Margining IP ultra-low power technology.
“Mobile and consumer IoT applications demand low-power, always-on, wake-up capabilities,” remarks Kelvin Low, vice president of marketing, Physical Design Group, Arm. “By implementing Arm physical IP, Minima Processor is able to optimize these features and deliver significant power and area reductions while meeting the performance requirements for these applications.”
“Access to Arm’s physical IP portfolio gives us the means to provide Arm users with optimized ultra-low power solutions for a variety of applications,” says Tuomas Hollman, Minima Processor’s executive vice president of products and business development. “The collaboration helps designers achieve their SoC performance, power, and area targets.”
Intended for a range of markets, including microcontroller, IoT, hearables and smart speakers, Minima Processor’s ultra-low power technology minimizes energy consumption while maintaining yield in IC production. Combining hardware and software enables circuits to function at their lowest possible power for any given task, data or ambient condition.
Arm and Minima Processor will be featured in panel sessions at the Design Automation Conference Pavilion area and ES Design West’s “Meet the Experts” Theater. DAC will be held June 2-6 in the Las Vegas Convention Center, Las Vegas, Nevada. The inaugural ES Design West will be co-located with SEMICON West July 9-11 at San Francisco’s Moscone Center.
About Minima Processor
Minima Processor of Oulu, Finland, provides near-threshold voltage design solutions that deploy dynamic margining and ultra-wide dynamic voltage and frequency scaling (DVFS) to minimize energy consumption in SoC designs while maintaining yield. The Minima dynamic-margining approach is an IP-based methodology for near-threshold voltage design that combines hardware and software to enable circuits to function at their lowest possible power for any given task, data or ambient condition.
Founded in 2016 by seasoned technical and R&D professionals with expertise in energy-efficiency technology, it is privately held and funded by Aalto University, CFT Nordic Investment Center, Lifeline Ventures, VTT Ventures, and angel investors.
For more information, visit https://minimaprocessor.com/.